DocumentCode
3261793
Title
Asynchronous circuits sensitivity to fault injection
Author
Monnet, Y. ; Renaudin, M. ; Leveugle, R.
Author_Institution
TIMA laboratory, Grenoble, France
fYear
2004
fDate
12-14 July 2004
Firstpage
121
Lastpage
126
Abstract
This paper presents an analysis of the faults sensitivity of Quasi Delay Insensitive (QDI) asynchronous circuits. Faults considered in this work can be either natural or intentional. However, fault injection attacks which consist in causing an intentional temporary dysfunction of a circuit by injecting faults in its combinational or sequential parts are of prime interest. This failure enables hackers to access protected memory areas or secret information like cryptographic keys. This work focuses on analysing the sensitivity of asynchronous circuits to fault injection. A circuit fault-sensitivity criterion is defined, which enables to point out weak parts of the circuits in order to specify hardening strategies.
Keywords
asynchronous circuits; fault simulation; logic testing; CAD tool; Muller gate; asynchronous circuits; circuit fault-sensitivity criterion; fault injection sensitivity; fault models; hardening strategies; quasi delay insensitive circuits; security properties; temporary dysfunction; Asynchronous circuits; Circuit faults; Clocks; Computer hacking; Cryptography; Delay; Laboratories; Protection; Protocols; Smart cards;
fLanguage
English
Publisher
ieee
Conference_Titel
On-Line Testing Symposium, 2004. IOLTS 2004. Proceedings. 10th IEEE International
Print_ISBN
0-7695-2180-0
Type
conf
DOI
10.1109/OLT.2004.1319669
Filename
1319669
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