An interface-circuit synthesis method with configurable processor core in IP-based SoC designs

In SoC designs, efficient communication between the hardware IPs and the on-chip processor becomes very important; however the interface is usually affected by the processor core specification. Thus in this paper, we focus on developing an efficient interface circuit architecture for the communications between the on-chip processor and embedded hardware IP cores, we also propose a method to synthesize it. Experimental results show that our method could obtain optimal interface circuits and works well through designing a MPEG-4 encode application.