An open characterization component tool

Author

Bonnardel, Jorge ; Raphalen, Philippe

fYear

1992

fDate

1-5 Jun 1992

Firstpage

89

Lastpage

93

Abstract

With the growth of new technologies, new architectures that often needs custom cells development with the maturity of ASIC synthesis tools as well as silicon and data path compilers, it is critical to provide CAE tools with very accurate information. This includes timing information, power information, capacitance information as well as physical information. This article presents a tool that automates all processes involved in standard cell or gate-array characterization and briefly shows how the extracted information will be used in an integrated CAE framework

Keywords

CAD/CAM; application specific integrated circuits; cellular arrays; circuit layout CAD; logic CAD; logic arrays; ASIC synthesis tools; CAE tools; capacitance information; custom cells development; data path compilers; gate-array characterization; integrated CAE framework; open characterization component tool; physical information; power information; standard cells; timing information; Application specific integrated circuits; Capacitance; Computer aided engineering; Data mining; Delay; Design automation; Design methodology; Libraries; Spatial databases; Timing;

fLanguage

English

Publisher

ieee

Conference_Titel

Euro ASIC '92, Proceedings.

Conference_Location

Paris

Print_ISBN

0-8186-2845-6

Type

conf

DOI

10.1109/EUASIC.1992.228053

Filename

228053