DocumentCode :
3261866
Title :
Datapath implementation: bit-slice structure versus standard cells
Author :
Leveugle, R. ; Safinia, C. ; Magarshack, P. ; Sponga, L.
Author_Institution :
Inst. Nat. Polytech. de Grenoble, France
fYear :
1992
fDate :
1-5 Jun 1992
Firstpage :
83
Lastpage :
88
Abstract :
In some CAD systems, the implementation of regular or semi-regular datapaths is eased by providing specific tools, called `datapath compilers´. These tools take profit from the regularity in the datapath specification and generally use a bit-slice structure for the implementation. In other systems, no specific tool is provided and the datapaths are implemented using classical standard cell or block place and route tools. This paper proposes a framework for both evaluating the interest of using datapath compilers and comparing the effectiveness of different tools. Then, some experiments on commercially available datapath compilers demonstrate that a standard cell implementation is less efficient, at least for two-level metal technologies
Keywords :
application specific integrated circuits; cellular arrays; integrated circuit technology; logic CAD; CAD systems; bit-slice structure; classical standard cell; datapath compilers; datapath specification; semi-regular datapaths; standard cells; two-level metal technologies; Application specific integrated circuits; Automata; Design automation; Integrated circuit interconnections; Libraries; Programmable logic arrays; Random access memory; Read only memory; Read-write memory; Registers;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Euro ASIC '92, Proceedings.
Conference_Location :
Paris
Print_ISBN :
0-8186-2845-6
Type :
conf
DOI :
10.1109/EUASIC.1992.228054
Filename :
228054
Link To Document :
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