High-level synthesis applied to an ASIC emulation board

Presents the application of high-level synthesis methodologies to an ASIC emulation board. The emulation board is part of a design methodology that supports the design of embedded information processing units in mechatronic systems during early design phases. The methodology provides fully functional prototypes which can be connected to the mechanical subsystem in order to estimate system performance. This paper addresses the automatic synthesis of hardware modules to be realized as ASICs