RF CMOS gate resistance and noise characterization

RF CMOS devices have been characterized and modeled by RF extension models using BSIM3v3 as the core transistor. The extension element of gate resistance has been measured under different bias conditions for devices with different geometries. The results show that the Rg dependence on Vgs is more pronounced for longer channel devices than shorter channel devices, which means the current common practice of using Rg extracted under one bias condition to generate RF extension models is problematic and needs to be re-evaluated. Especially, if models are provided across large channel length range, the Rg dependence on bias for longer channel lengths must be examined carefully. Device high frequency noise has also been measured and compared with simulation. The results show that RF extension based on BSIM3v3 SPICE model cannot predict device noise performance adequately. A practical solution which has been implemented in Cadence SPECTRE is presented.