DocumentCode
3262254
Title
Capacitance-voltage characterization for MOS capacitor on p-type high-resistivity silicon substrate
Author
Rong, B.
Author_Institution
Delft Inst. of Microelectron. & Sub-Micron Technol., Delft Univ. of Technol., Netherlands
Volume
1
fYear
2004
fDate
18-21 Oct. 2004
Firstpage
198
Abstract
Capacitance-voltage (C-V) characterization of MOS capacitors on p-type high-resistivity silicon is fully investigated within the usual frequency range of interest for first time to the best of our knowledge. The physics of the inverted surface channel and the material properties that changes with frequency are discussed in detail. The frequency limitation for obtaining high-frequency (HF) and low-frequency (LF) measurements for a 4000 ohm-cm silicon substrate is determined by means of experiments. Theoretical consideration of the dielectric relaxation time (to determine the majority carrier response time) and the minority carrier response time confirm the experimental results.
Keywords
MOS capacitors; dielectric relaxation; silicon; substrates; MOS capacitor; capacitance-voltage characterization; dielectric relaxation time; high-resistivity silicon substrate; inverted surface channel; material properties; minority carrier response time; p-type silicon substrate; Capacitance-voltage characteristics; Delay; Dielectric measurements; Dielectric substrates; Frequency; Hafnium; MOS capacitors; Material properties; Physics; Silicon;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State and Integrated Circuits Technology, 2004. Proceedings. 7th International Conference on
Print_ISBN
0-7803-8511-X
Type
conf
DOI
10.1109/ICSICT.2004.1434986
Filename
1434986
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