• DocumentCode
    3262725
  • Title

    A novel analysis method of threshold voltage shift due to detrap in a multi-level flash memory

  • Author

    Yamada, R. ; Sekiguchi, T. ; Okuyama, Y. ; Yugami, J. ; Kume, H.

  • Author_Institution
    Central Res. Lab., Hitachi Ltd., Tokyo, Japan
  • fYear
    2001
  • fDate
    12-14 June 2001
  • Firstpage
    115
  • Lastpage
    116
  • Abstract
    With the aim of improving flash-memory retention characteristics, we investigated threshold voltage shift (/spl Delta/V/sub th/) due to charge detrapping from the tunnel oxide. Accordingly, we propose a new parameter that can reveal the main origin of detrapping (hole/electron) and the detrap centroid. We found that the main origin of detrapping changes from holes to electrons depending on the degree of tunnel-oxide degradation. Since the hole detrapping increases V/sub th/ of a programmed memory cell, this V/sub th/ increase must be considered, especially when designing a multi-level flash memory.
  • Keywords
    carrier lifetime; electron traps; flash memories; hole traps; integrated circuit design; integrated memory circuits; tunnelling; charge detrapping; detrap; detrap centroid; detrapping; detrapping parameter; electron detrapping; flash-memory retention characteristics; hole detrapping; multi-level flash memory; multi-level flash memory design; programmed memory cell; threshold voltage shift; tunnel oxide; tunnel-oxide degradation; Charge carrier processes; Degradation; FETs; Flash memory; Laboratories; MOS capacitors; Pulse measurements; Stress measurement; Threshold voltage; Time measurement;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Technology, 2001. Digest of Technical Papers. 2001 Symposium on
  • Conference_Location
    Kyoto, Japan
  • Print_ISBN
    4-89114-012-7
  • Type

    conf

  • DOI
    10.1109/VLSIT.2001.934976
  • Filename
    934976