DocumentCode
3263026
Title
Non-uniform chip-temperature dependent signal integrity
Author
Ajami, A.H. ; Banerjee, K. ; Pedram, M.
Author_Institution
Dept. of Electr. Eng. Syst., Univ. of Southern California, Los Angeles, CA, USA
fYear
2001
fDate
12-14 June 2001
Firstpage
145
Lastpage
146
Abstract
In traditional design flows, the chip temperature is assumed to be uniform across the substrate. However, for most high-performance designs, the substrate temperature is nonuniform, which can be a major source of inaccuracy in delay and skew computations. This paper introduces the analysis and modeling of nonuniform substrate temperature and its effect on signal integrity. Using a novel nonuniform temperature-dependent analytical distributed RC interconnect delay model, the thermally dependent signal integrity metrics, i.e. signal delay and clock skew, are analyzed and some design techniques are provided to eliminate the nonuniform temperature-dependent clock skew.
Keywords
delays; integrated circuit design; integrated circuit interconnections; integrated circuit modelling; temperature distribution; thermal analysis; chip temperature uniformity; clock skew; delay computation inaccuracy; design flow; design techniques; nonuniform chip-temperature dependent signal integrity; nonuniform substrate temperature; nonuniform temperature-dependent analytical distributed RC interconnect delay model; nonuniform temperature-dependent clock skew; signal delay; signal integrity; skew computation inaccuracy; thermally dependent signal integrity metrics; Boundary conditions; Capacitance; Clocks; Delay; Integrated circuit interconnections; Signal analysis; Temperature; Thermal conductivity; Thermal management; Thermal resistance;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Technology, 2001. Digest of Technical Papers. 2001 Symposium on
Conference_Location
Kyoto, Japan
Print_ISBN
4-89114-012-7
Type
conf
DOI
10.1109/VLSIT.2001.934991
Filename
934991
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