Title :
Architecture of the VL86C020 RISC
Author :
Cates, Ron ; Farrell, James J., I
Author_Institution :
VLSI Technol. Inc., Tempe, AZ, USA
Abstract :
The VL86C020 microprocessor is a CMOS-technology reduced-instruction-set computing (RISC) device containing its own data cache on silicon. It was designed using the VLSI technology 1.5-μm two-layer metal single-polysilicon-process rules. The part operates with a baseline performance of 16 MHz and two packages: 149-pin plastic quad flatpack. Since the CPU unit of the VL86C020 is the same as the widely available VL86C010 RISC, the standard VL86C010 processor can be made available in the 1.5-μm process at 16 to 20 MHz as well
Keywords :
CMOS integrated circuits; VLSI; microprocessor chips; reduced instruction set computing; 1.5 micron; 16 MHz; CMOS-technology reduced-instruction-set computing; VL86C020 microprocessor; VLSI technology; data cache; plastic quad flatpack; CMOS technology; Cache memory; Clocks; Hardware; Information analysis; Microprocessors; Packaging; Reduced instruction set computing; Statistical analysis; Very large scale integration;
Conference_Titel :
CompEuro '89., 'VLSI and Computer Peripherals. VLSI and Microelectronic Applications in Intelligent Peripherals and their Interconnection Networks', Proceedings.
Conference_Location :
Hamburg
Print_ISBN :
0-8186-1940-6
DOI :
10.1109/CMPEUR.1989.93501
