DocumentCode :
3263096
Title :
Thermal performance evaluation of VLSI packaging
Author :
Staszak, Z.J. ; Prince, J.L. ; Simon, B.R.
Author_Institution :
Dept. of Electron., Gdansk Polytech., Poland
fYear :
1989
fDate :
8-12 May 1989
Abstract :
The authors address the problems of thermal performance evaluation of level-1 (chip and carrier) and level-2 (boards/modules and interconnects) integrated-circuit packages. Requirements for thermal modeling and experimental characterization are outlined. Models, simulation tools, and characterization tools and their assessment are discussed
Keywords :
VLSI; packaging; VLSI packaging; characterization tools; simulation tools; thermal modeling; thermal performance evaluation; Multidimensional systems; Packaging; Power dissipation; Sensor arrays; System testing; Thermal loading; Thermal resistance; Thermal stresses; Ultra large scale integration; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
CompEuro '89., 'VLSI and Computer Peripherals. VLSI and Microelectronic Applications in Intelligent Peripherals and their Interconnection Networks', Proceedings.
Conference_Location :
Hamburg
Print_ISBN :
0-8186-1940-6
Type :
conf
DOI :
10.1109/CMPEUR.1989.93503
Filename :
93503
Link To Document :
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