Title :
A low noisy triple channel graphic digitizer for UXGA compatible TFT LCD panels
Author :
Yoon, Sungwook ; Song, Minkyu
Author_Institution :
Dept. of Semicond. Sci., Dongguk Univ., Seoul, South Korea
Abstract :
A low noisy graphic digitizer is composed of an AGC, ADC, and PLL. In order to satisfy the specification of triple channel UXGA compatible TFT LCD panels, novel techniques and algorithms are proposed. It has been fabricated with a 5 metal 0.25 um CMOS technology. The chip area is about 3.6 mm×3.2 mm with 520 mW power dissipation at 2.5 V power supply. The maximum jitter noise of the PLL is about 10 ps at 230 MHz clock speed. The INL and DNL of the ADC are within 1 LSB
Keywords :
CMOS digital integrated circuits; analogue-digital conversion; integrated circuit layout; liquid crystal displays; thin film transistors; 0.25 micron; 2.5 V; 230 MHz; ADC; AGC; CMOS technology; PLL; UXGA compatible TFT LCD panels; chip area; low noisy triple channel graphic digitizer; maximum jitter noise; power dissipation; power supply; Automatic control; CMOS technology; Clocks; Computer displays; Graphics; Interpolation; Jitter; Phase locked loops; Semiconductor device noise; Thin film transistors;
Conference_Titel :
Consumer Electronics, 2001. ICCE. International Conference on
Conference_Location :
Los Angeles, CA
Print_ISBN :
0-7803-6622-0
DOI :
10.1109/ICCE.2001.935188
