DocumentCode
3263423
Title
Synthesis of asynchronous sequential circuits with minimum number of delay elements
Author
Armstrong, D.B. ; Friedman, A.D. ; Menon, P.R.
fYear
1967
fDate
18-20 Oct. 1967
Firstpage
95
Lastpage
105
Abstract
In this paper, we present a procedure for realizing any normal mode flow table by an asynchronous sequential circuit with a single pure delay, so that no hazards are present even if several input variables change in a transition. A modification of Unger´s single delay realization is also proposed in order to allow several inputs to change in a transition without producing output transients. We also show how any normal mode flow table can be realized without inserted delay elements if a restriction on the relative magnitudes of line and gate delays is satisfied and only one input variable is allowed to change in a transition.
Keywords
Circuit synthesis; Delay; Sequential circuits;
fLanguage
English
Publisher
ieee
Conference_Titel
Switching and Automata Theory, 1967. SWAT 1967. IEEE Conference Record of the Eighth Annual Symposium on
Conference_Location
Austin, TX, USA
Type
conf
DOI
10.1109/FOCS.1967.31
Filename
5397219
Link To Document