Title :
Dynamic-level scheduling for heterogeneous processor networks
Author :
Sih, Gilbert C. ; Lee, Edward A.
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA
Abstract :
Dynamic-level scheduling is an effective compile-time scheduling technique which accounts for interprocessor communication overhead when mapping precedence-constrained, communicating tasks onto arbitrarily interconnected processor networks. Scheduling and routing are performed simultaneously to account for limited interconnections between processors, and communications are scheduled along with computations to eliminate shared-resource contention. The paper extends the dynamic-level scheduling methodology to encompass heterogeneous processing environments, and presents two techniques designed to enhance scheduling performance: forward/backward scheduling, and precedence constraint appendage
Keywords :
parallel algorithms; parallel programming; program compilers; scheduling; arbitrarily interconnected processor networks; communicating tasks; compile-time scheduling; dynamic level scheduling; dynamic-level scheduling; forward/backward scheduling; heterogeneous processing environments; heterogeneous processor networks; interprocessor communication; precedence constraint appendage; precedence-constrained; routing; scheduling performance; Computer architecture; Concurrent computing; Data flow computing; Dynamic scheduling; Flow graphs; Hardware; Parallel processing; Processor scheduling; Scheduling algorithm; Signal processing algorithms;
Conference_Titel :
Parallel and Distributed Processing, 1990. Proceedings of the Second IEEE Symposium on
Conference_Location :
Dallas, TX
Print_ISBN :
0-8186-2087-0
DOI :
10.1109/SPDP.1990.143505