DocumentCode :
3264024
Title :
Design considerations for ISO/IEC 13818-1 decoders
Author :
Kovacevic, Branko
Author_Institution :
ATI Technol. Inc., Toronto, Ont., Canada
fYear :
2001
fDate :
2001
Firstpage :
92
Lastpage :
93
Abstract :
Important design considerations, principles and tradeoffs applied to the design of MPEG-2 transport stream demultiplexers suitable for integration with MPEG video/audio decoders and 2D/3D graphics core are presented. The described architecture integrates demultiplexing of the most frequent transport packets of MPEG HDTV video and audio streams into the register based hardware core and all digital teletext/subtitling decoding functions and user or private data processing on low to midrange performance host CPU (Pentium 200 MHz or MIPS 166 MHz). This results in the greater flexibility and reduction of the hardware cost of digital set-top receivers
Keywords :
CMOS digital integrated circuits; IEC standards; ISO standards; code standards; decoding; demultiplexing equipment; digital signal processing chips; digital video broadcasting; high definition television; integrated circuit design; television receivers; video signal processing; 2D/3D graphics core; ISO/IEC 13818-1 decoders; MPEG HDTV audio streams; MPEG HDTV video stream; MPEG video/audio decoders; MPEG-2 transport stream demultiplexer; design considerations; digital set-top receivers; digital teletext/subtitling decoding functions; register based hardware core; transport packets; Decoding; Demultiplexing; Graphics; HDTV; Hardware; IEC standards; ISO standards; Registers; Streaming media; Teletext;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Consumer Electronics, 2001. ICCE. International Conference on
Conference_Location :
Los Angeles, CA
Print_ISBN :
0-7803-6622-0
Type :
conf
DOI :
10.1109/ICCE.2001.935225
Filename :
935225
Link To Document :
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