DocumentCode
3264370
Title
H.26L intra mode encoder architecture for digital camera application
Author
Wang, Tu-Chih ; Tseng, Po-Chih ; Chen, Liang-Gee
Author_Institution
DSP/IC Lab., Nat. Taiwan Univ., Taipei, Taiwan
fYear
2001
fDate
2001
Firstpage
132
Lastpage
133
Abstract
In this paper, a still image encoder based on the H.26L intra mode algorithm is proposed and implemented in a FPGA prototype board. H.26L was proposed by ITU-T to provide high compression efficiency for very low bit rate communication. The intra mode in H.26L (H.26Li) uses high level spatial prediction and provides 2 db PSNR gain more than the JPEG standard. It is suitable for still image camera application and can be further extended into video camera application
Keywords
cameras; data compression; digital signal processing chips; field programmable gate arrays; image coding; 2 dB; FPGA prototype board; H.26L intra mode encoder architecture; H.26Li; PSNR gain; compression; digital camera application; spatial prediction; still image camera application; still image encoder; very low bit rate communication; video camera application; Bit rate; Costs; Digital cameras; Discrete cosine transforms; Hardware; Image coding; Image storage; PSNR; Prototypes; Transform coding;
fLanguage
English
Publisher
ieee
Conference_Titel
Consumer Electronics, 2001. ICCE. International Conference on
Conference_Location
Los Angeles, CA
Print_ISBN
0-7803-6622-0
Type
conf
DOI
10.1109/ICCE.2001.935243
Filename
935243
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