DocumentCode
3264441
Title
Dynamic MB-level Scheduling for parallel video coding
Author
Shengfu Dong ; Zhenyu Wang ; Ronggang Wang ; Wenmin Wang ; Wen Gao
Author_Institution
Shenzhen Grad. Sch., Peking Univ., Shenzhen, China
fYear
2013
fDate
8-11 Dec. 2013
Firstpage
145
Lastpage
148
Abstract
MB-level parallelism is widely used in parallel video coding thanks to its merits of low latency, no performance loss and high degree of parallelism. Most of video encoders with MB-level parallelism employ MB Row Scheduling (MRS) scheme. In software video encoder, early terminate algorithms tend to cause significant difference in coding time of different MBs. Consequently, the running speeds of multiple threads are unbalanced. When the number of threads is more than that of physical cores, the running speed unbalance is further worsened by computation resources competition among multiple threads. The computation resources of multiple cores can´t be fully utilized without careful handling of the above running speed unbalance. Additionally, synchronization of multiple threads can also penalize the running speed of the whole video encoder. In this paper, we analyze the running speed unbalance of multiple threads in MRS scheme, and propose a new Dynamic MB-level Scheduling (DMS) scheme for parallel video coding. DMS alleviates both the running speed unbalance and synchronization delay among multiple threads on multi-core platform. Experiment results verified that video encoder with MRS can be accelerated in average 9% by our proposed DMS, when processors are fully utilized.
Keywords
multi-threading; multiprocessing systems; video coding; DMS scheme; MB row scheduling scheme; MRS scheme; computation resources competition; dynamic MB-level scheduling; early terminate algorithms; multicore platform; multiple threads; parallel video coding; physical cores; running speed; software video encoder; synchronization delay; Dynamic scheduling; Encoding; Instruction sets; Parallel processing; Synchronization; Video coding; MB-level parallelism; Video coding; parallel scheduling; speed unbalance; thread competition;
fLanguage
English
Publisher
ieee
Conference_Titel
Picture Coding Symposium (PCS), 2013
Conference_Location
San Jose, CA
Print_ISBN
978-1-4799-0292-7
Type
conf
DOI
10.1109/PCS.2013.6737704
Filename
6737704
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