Reconfigurable design with clock gating

This paper describes an approach for developing energy-optimized run-time reconfigurable designs which benefit from clock gating. The approach is applied to two techniques: multiplexer-based reconfiguration, and reconfigurable word-length optimization. The conditions under which this approach would be preferable to bit-stream reconfiguration are derived. Various case studies, such as ray tracing, guitar string simulation and matrix-vector multiplication, are used to illustrate this approach.