Title :
Symbolic moment computation with application to statistical timing analysis
Author_Institution :
Sch. of Microelectron., Shanghai Jiao Tong Univ., Shanghai, China
Abstract :
Recursive moment computation for RCL interconnect trees is reformulated in a novel symbolic representation. A hybrid data structure consisting of a capacitor tree and a multi-root binary decision diagram, both isomorphic to the circuit topology, is constructed for this symbolic representation. Moments up to any order can be computed more efficiently by this representation. Derivatives of high-order moments with respect to multiple parameters can also be computed using this data structure. Application of this symbolic moment calculator in statistical timing analysis is shown in this paper.
Keywords :
RLC circuits; binary decision diagrams; digital integrated circuits; integrated circuit design; integrated circuit interconnections; network topology; statistical analysis; timing; RCL interconnect trees; capacitor tree; circuit topology; high-order moments; hybrid data structure; isomorphic topology; multi-root binary decision diagram; statistical timing analysis; symbolic moment calculator; symbolic moment computation; symbolic representation; Capacitors; Circuit analysis computing; Computer applications; Data structures; Inductors; Integrated circuit interconnections; RLC circuits; Sliding mode control; Timing; Voltage;
Conference_Titel :
Microelectronics & Electronics, 2009. PrimeAsia 2009. Asia Pacific Conference on Postgraduate Research in
Conference_Location :
Shanghai
Print_ISBN :
978-1-4244-4668-1
Electronic_ISBN :
978-1-4244-4669-8
DOI :
10.1109/PRIMEASIA.2009.5397345
