A data hazard detection method for DSP with heavily compressed instruction set

Traditionally, to detect a data hazard, the conflict between reading and writing order of registers was examined, in the design based on a pipeline architecture. However, heavily compressed instruction sets brought extra difficulty to detect all data hazards effectively. A class-based data hazard detection method is presented, to take advantage of the feature that an instruction fulfilling different functions applies special registers respectively, therefore it is more reasonable and simpler for the DSP with heavily compressed instruction set to check out data hazards than conventional methods do. With the assistance of a hierarchical decoder and bypass circuits, this class-based detection method works well in general applications of DSPs, such as FIR, IIR and SIN. Furthermore, the results of synthesis illustrate that the implementation of this class-based detection improves the speed by 18.89%.