DocumentCode
3265875
Title
A simulation-based comparison of interconnection networks
Author
Raghunath, M.T. ; Ranade, Abhiram
Author_Institution
Div. of Comput. Sci., California Univ., Berkeley, CA, USA
fYear
1990
fDate
9-13 Dec 1990
Firstpage
98
Lastpage
103
Abstract
The authors evaluate some of the interconnection networks and routing algorithm proposed for large scale parallel computers. They compare different algorithms on networks built using a limited number of packages, each with a limited pin count, and using limited board layout area. Performance of each network is measured by simulating the execution of a synthetic program. The results quantify the extent to which network latency can be hidden because of the ability to initiate several memory accesses without blocking. The results also indicate that message combining is useful to avoid performance degradation in the presence of hot-spot traffic
Keywords
multiprocessor interconnection networks; parallel algorithms; performance evaluation; hot-spot traffic; interconnection networks; large scale parallel computers; layout area; memory accesses; message combining; network latency; network performance; packages; performance degradation; pin count; program execution simulation; routing algorithm; synthetic program; Computational modeling; Computer networks; Concurrent computing; Degradation; Delay; Large-scale systems; Multiprocessor interconnection networks; Packaging; Routing; Telecommunication traffic;
fLanguage
English
Publisher
ieee
Conference_Titel
Parallel and Distributed Processing, 1990. Proceedings of the Second IEEE Symposium on
Conference_Location
Dallas, TX
Print_ISBN
0-8186-2087-0
Type
conf
DOI
10.1109/SPDP.1990.143514
Filename
143514
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