DocumentCode :
3266168
Title :
A model for a reusable system-on-a-chip hardware component integrated with design exploration methodology
Author :
Sllame, Azeddien M.
Author_Institution :
Dept. of Comput. Sci., Al-Fateh Univ., Tripoli, Libya
fYear :
2004
fDate :
19-21 July 2004
Firstpage :
287
Lastpage :
290
Abstract :
This paper presents a proposal for reusable hardware core (component) model. The model is designed based on the knowledge gained by the exploiting the design space exploration methodology presented in (Sllame, 2003). The model structure contains component characterization, computation core specified in VHDL language, a test bench to smooth the component integration process within the application and interfacing.
Keywords :
hardware description languages; integrated circuit design; integrated circuit modelling; reconfigurable architectures; system-on-chip; VHDL; component characterization; component integration; computation core; design exploration; hardware component; reusable hardware core; reusable system-on-a-chip; Application software; Computer interfaces; Computer science; Design methodology; Hardware; Process design; Proposals; Space exploration; System-on-a-chip; Virtual prototyping;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
System-on-Chip for Real-Time Applications, 2004.Proceedings. 4th IEEE International Workshop on
Print_ISBN :
0-7695-2182-7
Type :
conf
DOI :
10.1109/IWSOC.2004.1319895
Filename :
1319895
Link To Document :
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