Title :
Dynamic test or no-test?
Author :
Kirkland, Larry V. ; Matsuura, Dean ; Orlidge, Les
Author_Institution :
OO-ALC, Hill AFB, UT, USA
Abstract :
Most of the test programs used to verify the performance of digital electronics in today´s factories and repair/overhaul facilities continue to use settled state (static) testing including many programs executing on high speed test systems. The term “at speed” typically means that the rate at which new test patterns are introduced to a circuit under test matches the rate at which the circuit normally operates. Static testing results from tests in which a test pattern or test vector is evaluated only after the effects of a change to the input of a circuit are propagated to a final settled circuit condition, or static condition. Therefore, a test program that exercises the circuit under test “at speed,” but uses a single strobe to sample the output at or near the end of a clock cycle is a static test. Likewise, in a settled state pattern simulator (static) like LASAR V5, a pattern is a single combination of input states, whose effects on the circuit model are propagated to a final settled circuit condition. Only after all activity from a pattern had settled would the next pattern be simulated. In contrast, a dynamic functional pattern (which LASAR V6 can produce) is a user defined period of time during which inputs can be stimulated with user defined drive phases (edges) and outputs can be strobed with user defined windows. Also, the dynamic functional pattern can consist of multiple cycles, each of which can have multiple defined drive phases and defect windows. LASAR V6 software can produce the dynamic functional patterns, which are the stimuli required to emulate the end use system backplane environment of the board under test
Keywords :
automatic testing; digital integrated circuits; electronic engineering computing; integrated circuit testing; LASAR V5 software; LASAR V6 software; digital electronics; dynamic functional pattern simulator; dynamic testing; integrated circuit; settled state pattern simulator; static testing; Aerospace electronics; Circuit simulation; Circuit testing; Clocks; Electronic equipment testing; Investments; Pattern matching; Production facilities; System testing; Telephony;
Conference_Titel :
AUTOTESTCON '99. IEEE Systems Readiness Technology Conference, 1999. IEEE
Conference_Location :
San Antonio, TX
Print_ISBN :
0-7803-5432-X
DOI :
10.1109/AUTEST.1999.800424