DocumentCode
3267062
Title
Instruction level analytic prediction of parallel CPU architecture performance
Author
De Gloria, Alessandro ; Ancarani, Fabio ; Bellotti, Francesco ; Olivieri, Mauro
Author_Institution
Genoa Univ., Italy
fYear
35765
fDate
8-10 Dec1997
Firstpage
530
Lastpage
534
Abstract
We present a first version of a performance prediction method for compiler driven superscalar CPUs, founded on analytic calculations on the basis of an unlimited resource simulation of the benchmark program. We illustrate the accuracy of the results by comparison with real execution simulation for three benchmark programs
Keywords
instruction sets; microprogramming; parallel architectures; parallel programming; performance evaluation; program compilers; real-time systems; analytic calculations; benchmark program; compiler driven superscalar CPU; instruction level analytic prediction; parallel CPU architecture performance; performance prediction method; real time system; unlimited resource simulation; Analytical models; Computational modeling; Delay; Microprocessors; Performance analysis; Prediction methods; Predictive models; Program processors; Real time systems; Registers;
fLanguage
English
Publisher
ieee
Conference_Titel
Intelligent Information Systems, 1997. IIS '97. Proceedings
Conference_Location
Grand Bahama Island
Print_ISBN
0-8186-8218-3
Type
conf
DOI
10.1109/IIS.1997.645379
Filename
645379
Link To Document