A 1 GHz-0.9 mA/1 V CMOS/SIMOX/128/129 dual modulus prescalar using a newly developed counter

Author

Kado, Y. ; Suzuki, M. ; Koike, K. ; Omura, Y. ; Izumi, K.

Author_Institution

NTT LSI Lab., Atsugi, Japan

fYear

1992

fDate

4-6 June 1992

Firstpage

44

Lastpage

45

Abstract

An extremely low-power, gigahertz-range CMOS dual modulus prescaler is described. To enhance performance, an advanced ultra-thin-film CMOS/SIMOX process and a divide-by-2/3 synchronous counter composed of clocked-inverter type dynamic D-F/Fs are introduced. With the same technologies a very low-power CMOS PLL LSI was also realized. A CMOS/SIMOX 1/16 static frequency divider operating up to 2.7 GHz was fabricated. According to SPICE simulation, its performance can be greatly improved by reducing the parasitic source and drain resistances.<>

Keywords

CMOS integrated circuits; SIMOX; frequency dividers; phase-locked loops; scaling circuits; 0.9 mA; 1 V; 1 to 2.7 GHz; CMOS; CMOS PLL LSI; CMOS/SIMOX; SPICE simulation; dual modulus prescalar; dynamic D-type flip-flops; gigahertz-range; low-power; parasitic drain resistance; parasitic source resistance; performance; static frequency divider; synchronous counter; ultra-thin-film; CMOS technology; Clocks; Counting circuits; Energy consumption; Frequency conversion; Laboratories; Large scale integration; Phase locked loops; Silicon; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Circuits, 1992. Digest of Technical Papers., 1992 Symposium on

Conference_Location

Seattle, WA, USA

Print_ISBN

0-7803-0701-1

Type

conf

DOI

10.1109/VLSIC.1992.229244

Filename

229244