Title :
Basic multiple-valued functions using recharge CMOS logic
Author :
Berg, Y. ; Aunet, S. ; Noess, O. ; Mirmotahari, O.
Author_Institution :
Dept. of Inf., Oslo Univ., Norway
Abstract :
In this paper, we present novel recharge logic for multiple-valued (MV) systems by utilizing semi-floating-gate (SFG) transistors. The recharge multiple-valued logic can be used to implement low-power digital transition logic circuits. The improvement in power dissipation is mainly in reduced dynamic power dissipation. In this paper, the basic functions suitable for synthesis of MV logic are presented. The main purpose is to level out the power dissipated by a digital system to obtain more suitable logic for mixed mode design.
Keywords :
CMOS logic circuits; low-power electronics; multivalued logic circuits; MV logic; SFG transistors; dynamic power dissipation; low-power digital transition logic; mixed mode design; multiple-valued functions; power dissipation reduction; recharge CMOS logic; semi-floating-gate transistors; CMOS logic circuits; Delay effects; Digital circuits; Energy consumption; Frequency response; Logic circuits; MOSFETs; Multivalued logic; Power dissipation; Voltage;
Conference_Titel :
Multiple-Valued Logic, 2004. Proceedings. 34th International Symposium on
Print_ISBN :
0-7695-2130-4
DOI :
10.1109/ISMVL.2004.1319966
