• DocumentCode
    3267637
  • Title

    A high-speed RISC CPU using the QL16×24 FPGA

  • Author

    Kleinman, Bruce ; Cox, Bill

  • Author_Institution
    QuickLogic Corp., Planegg, Germany
  • fYear
    1993
  • fDate
    28-30 Sep 1993
  • Firstpage
    245
  • Lastpage
    250
  • Abstract
    State-of-the-art FPGAs will open new application areas for programmable logic previously possible only with ASIC or custom solutions. New submicron programmable ASICs (pASICs) from QuickLogic will push the industry´s fastest FPGA architecture to higher speeds and higher densities. This paper describes an intriguing application a high-performance 16-bit RISC CPU designed in a QuickLogic QL16×24 FPGA
  • Keywords
    application specific integrated circuits; field programmable gate arrays; microprocessor chips; reduced instruction set computing; 16 bit; QuickLogic QL16x24 FPGA; arithmetic circuits; datapath circuits; high-speed RISC CPU; programmable logic; state machines; submicron pASIC; Automatic logic units; Central Processing Unit; Delay; Field programmable gate arrays; Flip-flops; Logic arrays; Logic circuits; Logic devices; Reduced instruction set computing; Routing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    WESCON/'93. Conference Record,
  • Conference_Location
    San Francisco, CA
  • ISSN
    1095-791X
  • Print_ISBN
    0-7803-9970-6
  • Type

    conf

  • DOI
    10.1109/WESCON.1993.488442
  • Filename
    488442
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3267637