Synthesis of physically heterogeneous systems on chip

Author

O´Connor, Ian ; Charlery, Hervé

Author_Institution

Univ. de Lyon, Ecully

fYear

2007

fDate

5-8 Aug. 2007

Firstpage

634

Lastpage

637

Abstract

In this paper, we describe design technology issues and motivations involved with physically heterogeneous systems on chip. A Petri-net style approach is used to visualize possible design process routes through abstraction levels and structural decomposition, from system-level specifications to physical design. Transitions between nodes are based on an iterative design process and design information formalization (AMS IP). This method has been implemented and used to explore tradeoffs between photonic and electronic components.

Keywords

Petri nets; integrated circuit design; iterative methods; mixed analogue-digital integrated circuits; system-on-chip; Petri-net style approach; abstraction levels; analogue mixed-signal IP; design information formalization; electronic components; heterogeneous systems on chip synthesis; iterative design process; photonic components; structural decomposition; system-level specifications; Costs; Design methodology; Mobile computing; Nanotechnology; Power generation economics; Process design; Production systems; Radio frequency; Signal design; System-on-a-chip; Design automation; Design methodology; Heterogeneous SoC-SiP; Petri nets;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2007. MWSCAS 2007. 50th Midwest Symposium on

Conference_Location

Montreal, Que.

ISSN

1548-3746

Print_ISBN

978-1-4244-1175-7

Electronic_ISBN

1548-3746

Type

conf

DOI

10.1109/MWSCAS.2007.4488661

Filename

4488661