Title :
A 1 Mb 5-transistor/bit non-volatile CAM based on flash-memory technologies
Author :
Miwa, T. ; Yamada, H. ; Hirota, Y. ; Satoh, T. ; Hara, H.
Author_Institution :
NEC Corp, Kanagawa, Japan
Abstract :
A 1 Mb content-addressable memory LSI based on flash technologies (flash CAM) has memory cells consisting of a pair of flash memory cell transistors. 10.34 /spl mu/m/sup 2/ cell and 42.9mm/sup 2/ die are attained with 0.8 /spl mu/m design rules. The flash CAM can be searched for masked binary data. Read access time and search access time are 115 ns and 145 ns, respectively, with a 5 V supply voltage. Power dissipation is 200 mW at 3.3 MHz. The flash CAM cell consists of two floating-gate transistors. This structure is in strong contrast to the comparator-added-storage structure of 17-transistor SRAM-based cells or five-transistor two-capacitor of DRAM-based cells. In addition to non-volatility, flash CAMs also feature on-board programmable/erasable memory.
Keywords :
EPROM; content-addressable storage; integrated memory circuits; large scale integration; 0.8 micron; 1 Mbit; 200 mW; 3.3 MHz; 5 V; LSI; content addressable memory; five-transistor bit nonvolatile CAM; flash memory; floating-gate transistors; masked binary data; on-board programmable/erasable memory; CADCAM; Circuits; Computer aided manufacturing; Delay; Differential amplifiers; Large scale integration; Multivalued logic; Nonvolatile memory; Power dissipation; Voltage;
Conference_Titel :
Solid-State Circuits Conference, 1996. Digest of Technical Papers. 42nd ISSCC., 1996 IEEE International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-3136-2
DOI :
10.1109/ISSCC.1996.488505
