Title :
A digitally-enhanced 2-0 ΔΣ ADC
Author :
Malla, Pukar ; Lakdawala, Hasnain ; Kornegay, Kevin ; Soumyanath, K.
Author_Institution :
Cornell Univ., Ithaca
Abstract :
Voltage supply scaling and wide signal bandwidth require that modern delta sigma (DeltaSigma) architectures surmount the low oversampling ratio (OSR) challenges with low- distortion design. An analog feedforward architecture (AFF) mitigates these issues by reducing the swing at the integrator outputs but requires an analog adder. A two-stage digitally enhanced 2-0 (DE2-0) architecture that employs digital addition and a FLASH ADC in the second stage is proposed. DE2-0 reaps the benefits of AFF, while eliminating the need for an analog adder and attaining a SNR of 63.5 dB at OSR of 10 for a 20 MHz input bandwidth, with 22.8% figure of merit (FOM) improvement over AFF.
Keywords :
delta-sigma modulation; feedforward; FLASH ADC; analog feedforward architecture; bandwidth 20 MHz; delta sigma architectures; digitally-enhanced DeltaSigma ADC; noise figure 63.5 dB; oversampling ratio; voltage supply scaling; wide signal bandwidth; Adders; Bandwidth; Circuits; Dynamic voltage scaling; Feedback; Nonlinear distortion; Quantization; Signal design; Topology; Wideband;
Conference_Titel :
Circuits and Systems, 2007. MWSCAS 2007. 50th Midwest Symposium on
Conference_Location :
Montreal, Que.
Print_ISBN :
978-1-4244-1175-7
Electronic_ISBN :
1548-3746
DOI :
10.1109/MWSCAS.2007.4488722
