• DocumentCode
    3269047
  • Title

    A modified background calibration technique for multi-bit delta-sigma modulators

  • Author

    Peng, Bei ; Li, Hao ; Lin, Pingfen

  • Author_Institution
    Beijing Embedded Syst. Key Lab., Beijing Univ. of Technol., Beijing, China
  • fYear
    2011
  • fDate
    18-20 Jan. 2011
  • Firstpage
    206
  • Lastpage
    208
  • Abstract
    A digital background calibration technique for capacitors mismatch in multi-bit delta-sigma modulator is proposed in this paper. The approach is correlation-based, in which a single-bit pseudo-random noise (PN) is used to identify the error module, minimizing the analog circuit overhead. This algorithm works by estimating every DAC capacitor in turn with the PN signal injection and compensates for capacitor mismatch in digital domain. It is simple and requires minor circuit modification in analog domain. The tradeoff involved is the dynamic range degradation due to PN injection. Behavior level simulations demonstrate effective compensation for capacitors mismatch in a second-order modulator.
  • Keywords
    analogue circuits; calibration; capacitors; delta-sigma modulation; digital-analogue conversion; random noise; DAC capacitor; PN signal injection; analog circuit; capacitor mismatch; circuit modification; digital background calibration technique; digital domain; error module; modified background calibration technique; multibit delta-sigma modulators; second-order modulator; single-bit pseudo-random noise; Calibration; Modulation; Capacitor mismatch; Delta-Sigma modulator; PN sequence; SNDR; digital calibration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Advanced Computer Control (ICACC), 2011 3rd International Conference on
  • Conference_Location
    Harbin
  • Print_ISBN
    978-1-4244-8809-4
  • Electronic_ISBN
    978-1-4244-8810-0
  • Type

    conf

  • DOI
    10.1109/ICACC.2011.6016398
  • Filename
    6016398