A systematic system level design methodology for dual band CMOS RF receivers

A systematic system-level design methodology for dual-band RF CMOS receiver is proposed. The methodology helps the designer to find the optimum set of specifications of the receiver´s building blocks for minimizing the power consumption. Our analysis is based on analytical expressions for the input referred noise, input referred third order intercept point and gain as a function of the frequency for the various blocks. This methodology is applied to a dual-band receiver for the GSM (900 MHz) and PCS (1900 MHz) standards. Simulations show that having an LNA with a constant gain behavior reduces the power consumption by 75% compared to an LNA with a decreasing gain versus frequency.