Title :
An analog parallel array processor for real-time sensor signal processing
Author :
Kinget, P. ; Steyaer, M.
Author_Institution :
Katholieke Univ., Leuven, Belgium
Abstract :
A fully-programmable analog signal processor and its operation in a sensor signal processing system is presented. The analog parallel array processor (APAP) chip is the core of the system. It contains a 20/spl times/20 matrix of computing cells, function-control circuits and interface circuits. The sensor provides the input signals for the APAP chip. The architecture ofthe 400 cells is based on a cellular neural network architecture. The cells have an internal-state node, an input node and an output. The output is the clipped version ofthe state. The cells send two current signals to their nearest neighbors and to itself: one proportional to the input and controlled by the feedforward weights or B-template; the second proportional to the output and controlled by the feedback weights or A-template. In every cell a constant bias source, controlled by the I-template, is also included. The templates are identical for all cells and are the instructions for the APAP. In this implementation the user can program the template weights over a continuous range of values from /spl plusmn/1/4 to /spl plusmn/4. All cells execute the instructions in parallel and in continuous time so that a parallel array processor is obtained with real-time signal processing capabilities. Several 2D global and local feature extraction operations such as edge detection, pixel peeling, hole-filling, connected component detection, and resistive grid filtering can be executed.
Keywords :
CMOS analogue integrated circuits; analogue processing circuits; array signal processing; cellular neural nets; neural chips; parallel architectures; real-time systems; signal processing equipment; 2D global operations; A-template; APAP chip; B-template; I-template; analog parallel array processor; cellular neural network architecture; connected component detection; continuous time operation; edge detection; feedback weights; feedforward weights; function-control circuits; hole-filling; interface circuits; local feature extraction operations; pixel peeling; programmable analog signal processor; real-time signal processing; resistive grid filtering; sensor signal processing; Array signal processing; Cellular neural networks; Circuits; Computer architecture; Computer interfaces; Nearest neighbor searches; Proportional control; Sensor arrays; Sensor systems; Signal processing;
Conference_Titel :
Solid-State Circuits Conference, 1996. Digest of Technical Papers. 42nd ISSCC., 1996 IEEE International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-3136-2
DOI :
10.1109/ISSCC.1996.488527