Title :
Solution space reduction of sequence pairs using model placement
Author :
Yano, Yuuki ; Kaneko, Mineo
Author_Institution :
Japan Adv. Inst. of Sci. & Technol., Ishikawa
Abstract :
This paper proposes a reduced solution space for the sequence-pair based placement. Assuming that some "model placement" is given, we will extract relative spatial relation between modules from it. Based on this extracted information, we will impose some constraints on permutations Gamma+ and Gamma- of modules in a sequence pair code in order to reduce the solution space without losing good solutions. As a practical implementation of this concept, the result of the so called "Force Directed Placement" is used as our model placement, constraints are extracted from it, and Simulated Annealing is applied to the reduced sequence-pair solution space. The experimental results show us that the combination of the reduced solution space with SA search has an excellent potential in wire length minimization while keeping a comparable potential in area minimization.
Keywords :
VLSI; integrated circuit layout; simulated annealing; force directed placement; model placement; relative spatial relation; sequence pairs; simulated annealing; solution space reduction; wire length minimization; Costs; Data mining; Electronic mail; Physics computing; Simulated annealing; Space exploration; Space technology; Temperature; Very large scale integration; Wire;
Conference_Titel :
Circuits and Systems, 2007. MWSCAS 2007. 50th Midwest Symposium on
Conference_Location :
Montreal, Que.
Print_ISBN :
978-1-4244-1175-7
Electronic_ISBN :
1548-3746
DOI :
10.1109/MWSCAS.2007.4488756