DocumentCode
3270205
Title
Fast estimation of interconnects delay in RLC trees using neural network
Author
Hoseini, Fahimeh Alsadat ; Masoumi, Nasser
Author_Institution
Univ. of Tehran, Tehran
fYear
2007
fDate
5-8 Aug. 2007
Firstpage
1309
Lastpage
1312
Abstract
This paper presents a novel approach based on training an artificial neural network to estimate interconnects delay in RLC trees. The neural network can be described as the mapping of a set of inputs (damping factor and input signal rise time) to the corresponding output (propagation delay) through a system of weighting factors and biases. In this work, we employ an exponential signal as the input signal. Using the proposed method, we would compute efficiently and accurately the propagation delay time of RLC trees.
Keywords
RLC circuits; VLSI; delay circuits; delay estimation; electronic engineering computing; integrated circuit interconnections; neural nets; RLC trees; artificial neural network; damping factor; exponential signal; input signal rise time; interconnects delay estimation; propagation delay time; Artificial neural networks; Damping; Delay estimation; Inductance; Integrated circuit interconnections; Neural networks; Propagation delay; RLC circuits; Transfer functions; Very large scale integration; Interconnects delay; RLC tree; neural network;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2007. MWSCAS 2007. 50th Midwest Symposium on
Conference_Location
Montreal, Que.
ISSN
1548-3746
Print_ISBN
978-1-4244-1175-7
Electronic_ISBN
1548-3746
Type
conf
DOI
10.1109/MWSCAS.2007.4488791
Filename
4488791
Link To Document