DocumentCode
3270233
Title
Analysis of current-to-data dependency in asynchronous cryptographic circuits
Author
Muresan, Radu ; Gregori, Stefano
Author_Institution
Univ. of Guelph, Guelph
fYear
2007
fDate
5-8 Aug. 2007
Firstpage
1316
Lastpage
1319
Abstract
This paper presents analysis of current-to-data dependency for a circuit implementing the DES algorithm. The circuit is realized in CMOS 0.18 mum technology as an asynchronous design with optimized XOR gates and enable encryption signal randomly delayed from cycle-to-cycle. Initial results using Spice simulation waveforms show that the DPA attack is unsuccessful.
Keywords
cryptography; logic gates; Spice simulation waveform; asynchronous cryptographic circuit; current-to-data dependency; encryption signal; optimized XOR gate; Algorithm design and analysis; Circuits; Cryptography; Delay; Design optimization; Electromagnetic analysis; Electromagnetic modeling; Latches; Power dissipation; Semiconductor device modeling;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2007. MWSCAS 2007. 50th Midwest Symposium on
Conference_Location
Montreal, Que.
ISSN
1548-3746
Print_ISBN
978-1-4244-1175-7
Electronic_ISBN
1548-3746
Type
conf
DOI
10.1109/MWSCAS.2007.4488793
Filename
4488793
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