• DocumentCode
    3270316
  • Title

    A multimedia-enhanced x86 processor

  • Author

    Norrod, F. ; Wawrzynek, R.

  • Author_Institution
    Syst. Technol. Lab., Cyrix Corp., Longmont, CO, USA
  • fYear
    1996
  • fDate
    10-10 Feb. 1996
  • Firstpage
    220
  • Lastpage
    221
  • Abstract
    This x86 compatible CPU with multimedia functionality includes DRAM controller, accelerated graphics controller, and PCI bus interface. The integer pipeline and L1 cache of the CPU are enhanced to accelerate graphics and multimedia applications, and take advantage of the on-chip peripherals. Modules integrated onto the die are chosen because they are high-value functions with compelling performance or reduced complexity when integrated with the CPU. Graphics and video functions benefit from a tight integration with the CPU since partitioning of functions between hardware and software can differ from a traditional architecture without hurting performance.
  • Keywords
    microprocessor chips; multimedia computing; CPU; DRAM controller; L1 cache; PCI bus interface; accelerated graphics controller; graphics functions; integer pipeline; integrated modules; multimedia functionality; on-chip peripherals; video functions; x86 processor; Acceleration; Control systems; Graphics; Hardware; History; Joining processes; Pipelines; Random access memory; Registers; Software performance;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference, 1996. Digest of Technical Papers. 42nd ISSCC., 1996 IEEE International
  • Conference_Location
    San Francisco, CA, USA
  • ISSN
    0193-6530
  • Print_ISBN
    0-7803-3136-2
  • Type

    conf

  • DOI
    10.1109/ISSCC.1996.488579
  • Filename
    488579