• DocumentCode
    3270386
  • Title

    Defect engineering in silicon used for ultra large-scale integrated circuits

  • Author

    Yang, Deren ; Yu, Xuegong ; Ma, Xiangyang ; Que, Duanlin

  • Author_Institution
    State Key Lab of Silicon Mater., Zhejiang Univ., Hangzhou, China
  • Volume
    3
  • fYear
    2004
  • fDate
    18-21 Oct. 2004
  • Firstpage
    2356
  • Abstract
    The internal gettering (IG) technology in Czochralski (CZ) silicon doped with different impurities (nitrogen, germanium and high concentration boron) have been investigated in the paper. It was found that the denuded zone (DZ) could be formed at the near-surface of the CZ silicon doped with these impurities by hi-lo-hi three-step annealing, even high temperature single-step annealing. Meanwhile, dense bulk microdefects (BMD) generated in the bulk of these wafers enabled strong capability of gettering detrimental metal impurities on the silicon wafer. In addition, the formation mechanism of the DZ and the BMD region in the CZ silicon doped with these impurities has been discussed.
  • Keywords
    ULSI; annealing; boron; crystal growth from melt; germanium; getters; nitrogen; silicon; BMD; CZ silicon; Czochralski silicon; Si:B; Si:Ge; Si:N; defect engineering; dense bulk microdefects; denuded zone; formation mechanism; germanium dopant; hi-lo-hi three-step annealing; high concentration boron dopant; high temperature single-step annealing; internal gettering technology; metal impurities; near surface; nitrogen dopant; ultra large-scale integrated circuits; Annealing; Boron; Germanium; Gettering; Impurities; Integrated circuit technology; Nitrogen; Paper technology; Silicon; Ultra large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State and Integrated Circuits Technology, 2004. Proceedings. 7th International Conference on
  • Print_ISBN
    0-7803-8511-X
  • Type

    conf

  • DOI
    10.1109/ICSICT.2004.1435320
  • Filename
    1435320