DocumentCode :
3270413
Title :
A 3 V 22 mW multi-bit current-mode /spl Sigma//spl Delta/ DAC with 100 dB dynamic range
Author :
Shinohara, Y. ; Terasawa, H. ; Ochiai, K. ; Hiraoka, M. ; Kanayama, H. ; Hamasaki, T.
Author_Institution :
Burr-Brown Japan Ltd., Atsugi, Japan
fYear :
1996
fDate :
10-10 Feb. 1996
Firstpage :
234
Lastpage :
235
Abstract :
This DAC chip is a dual-channel low-voltage low-power D/A conversion system associated with filter functions of digital input and analog output. The chip is intended for multi-media equipment that requires multi attenuation control of CD-ROM and multi-system clock frequency for Set-Top-Box. The ratio of analog area to digital area in a mixed-mode chip has been inversely proportional to process design-rules for a given dynamic range objective, which contradicts the LSI trend. This design realizes a high degree of size reduction commensurate with process design rules for the analog circuitry and a signal processing architecture for the digital circuitry. The conversion techniques give -90 dB full-scale THD+N and 100 dB dynamic range with 22 mW power consumption from a 3 V supply. The clock frequency for the system can be automatically switched for applications between 384 fs (CD) and 256 fs (ST-Box) by LR-clock. The chip is fabricated in 0.6 /spl mu/m DPDM double-poly double-metal CMOS.
Keywords :
CMOS integrated circuits; digital-analogue conversion; mixed analogue-digital integrated circuits; sigma-delta modulation; 0.6 micron; 22 mW; 3 V; CD-ROM; DPDM double-poly double-metal CMOS process; LR-clock; LSI; Set-Top-Box; analog circuitry; digital circuitry; dual-channel low-voltage low-power D/A conversion; dynamic range; filter functions; mixed-mode chip; multi attenuation control; multi-bit current-mode /spl Sigma//spl Delta/ DAC; multi-media equipment; multi-system clock frequency; process design rules; signal processing architecture; Attenuation; CD-ROMs; Circuits; Clocks; Digital filters; Dynamic range; Frequency; Large scale integration; Process design; Signal design;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 1996. Digest of Technical Papers. 42nd ISSCC., 1996 IEEE International
Conference_Location :
San Francisco, CA, USA
ISSN :
0193-6530
Print_ISBN :
0-7803-3136-2
Type :
conf
DOI :
10.1109/ISSCC.1996.488585
Filename :
488585
Link To Document :
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