• DocumentCode
    3270511
  • Title

    Hardware metering

  • Author

    Koushanfar, Farinaz ; Qu, Gang

  • Author_Institution
    Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA
  • fYear
    2001
  • fDate
    2001
  • Firstpage
    490
  • Lastpage
    493
  • Abstract
    We introduce the first hardware metering scheme that enables reliable low overhead proofs for the number of manufactured parts. The key idea is to make each design slightly different. Therefore, if two identical hardware designs or a design that is not reported by the foundry are detected, the design house has proof of misconduct. We start by establishing the connection between the requirements for hardware and synthesis process. Furthermore, we present mathematical analysis of statistical accuracy of the proposed hardware metering scheme. The effectiveness of the metering scheme is demonstrated on a number of designs.
  • Keywords
    circuit CAD; field programmable gate arrays; industrial property; integrated circuit design; logic CAD; FPGA; IC design; IP; design house; hardware metering scheme; low overhead proofs; manufactured parts; mathematical analysis; statistical accuracy; Cryptography; Fingerprint recognition; Foundries; Hardware; Intrusion detection; Manufacturing; Protection; Reverse engineering; Signal design; Testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference, 2001. Proceedings
  • ISSN
    0738-100X
  • Print_ISBN
    1-58113-297-2
  • Type

    conf

  • DOI
    10.1109/DAC.2001.156189
  • Filename
    935558