DocumentCode
327073
Title
Repair of memory arrays by cutting
Author
Park, N. ; Lombardi, F.
Author_Institution
School of Mines & Technol., Rapid City, SD, USA
fYear
1998
fDate
24-25 Aug 1998
Firstpage
124
Lastpage
130
Abstract
This paper presents new algorithms for yield enhancement of redundant memories. These algorithms are based on the technique of spare cutting for a redundant memory chip in which repair is implemented by row/column deletion. Different approaches are proposed: some of these approaches are based on a fully exhaustive process, while others try to heuristically reduce the computational overhead involved in determining the repair-solution of a redundant memory. Conditions for unidirectional and bidirectional cutting (i.e. cutting either along the rows and/or columns of the memory) are analyzed
Keywords
VLSI; integrated circuit yield; integrated memory circuits; random-access storage; redundancy; bidirectional cutting; memory array repair; memory chip; redundant memories; row/column deletion; spare cutting; unidirectional cutting; yield enhancement algorithms; Cities and towns; Hip; Laser beam cutting; Logic arrays; Manufacturing; Production; Random access memory; Redundancy; Routing; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Memory Technology, Design and Testing, 1998. Proceedings. International Workshop on
Conference_Location
San Jose, CA
Print_ISBN
0-8186-8494-1
Type
conf
DOI
10.1109/MTDT.1998.705958
Filename
705958
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