Bit serial CORDIC DDFS design for serial digital down converter

This paper proposes a novel and area efficient bit serial CORDIC architecture, which acts as DDFS. The major advantage of proposed DDFS is that the data is bit serial which results in reduced area and better timing. The proposed architecture is best suited for bit serial communication system.. The proposed DDFS is an integral part of bit serial digital down converter. The design uses a modified CORIC algorithm which removes the dependency of each iteration on its previous iteration. This enables the design to use a parallel bit serial architecture, where parallel computations are performed at bit serial manner.