Title :
A 2.5 V 12 b 5 MSample/s pipelined CMOS ADC
Author :
Yu, P.C. ; Hae-Seung Lee
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., MIT, Cambridge, MA, USA
Abstract :
This 1.2 /spl mu/m, 33 mW analog-to-digital converter (ADC) demonstrates a family of power reduction techniques including a commutated feedback capacitor switching (CFCS), sharing of the second stage of an op amp between adjacent stages of a pipeline, reusing the first stage of an op amp as the comparator pre-amp, and exploiting parasitic capacitance as common-mode feedback capacitors.
Keywords :
CMOS integrated circuits; analogue-digital conversion; circuit feedback; comparators (circuits); pipeline processing; switching circuits; 1.2 micron; 12 bit; 2.5 V; adjacent stages; analog-to-digital converter; common-mode feedback capacitors; commutated feedback capacitor switching; comparator pre-amp; parasitic capacitance; pipelined CMOS ADC; power reduction techniques; Analog-digital conversion; CMOS technology; Capacitors; Feedback; High-resolution imaging; Operational amplifiers; Parasitic capacitance; Pipelines; Sampling methods; Voltage;
Conference_Titel :
Solid-State Circuits Conference, 1996. Digest of Technical Papers. 42nd ISSCC., 1996 IEEE International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-3136-2
DOI :
10.1109/ISSCC.1996.488633
