Coupling-driven bus design for low-power application-specific systems

In modern embedded systems including communication and multimedia applications, a large fraction of power is consumed during memory access and data transfer. Thus, buses should be designed and optimized to consume reasonable power while delivering sufficient performance. In this paper, we address a bus ordering problem for low-power application-specific systems. A heuristic algorithm is proposed to determine the order in a way that effective lateral component of capacitance is reduced, thereby reducing the power consumed by buses. Experimental results for various examples indicate that an average power saving from 30% to 46.7%, depending on capacitance components, can be obtained without any circuit overhead.