DocumentCode
3271530
Title
EDIF: test generation and fault simulation
Author
Eurich, John P.
Author_Institution
Eng. DataXpress Inc., San Jose, CA, USA
fYear
1988
fDate
Feb. 29 1988-March 3 1988
Firstpage
342
Lastpage
345
Abstract
The availability of commercially developed signal simulation products has created a need for a standard set of tests or benchmarks against which these products can be evaluated and compared. To be of any value, these benchmarks must be in a form that will allow them to be easily installed on the many different systems available. The electronic design interchange format (EDIF) is analyzed to determine if it is a viable form in which to distribute digital simulation benchmarks and tests.<>
Keywords
digital simulation; logic CAD; logic testing; EDIF; digital simulation benchmarks; electronic design interchange format; fault simulation; signal simulation products; test generation; Automatic test pattern generation; Benchmark testing; Consumer electronics; Digital simulation; Electronic equipment testing; Logic design; Logic testing; Standards development; Switches; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Compcon Spring '88. Thirty-Third IEEE Computer Society International Conference, Digest of Papers
Conference_Location
San Francisco, CA, USA
Print_ISBN
0-8186-0828-5
Type
conf
DOI
10.1109/CMPCON.1988.4887
Filename
4887
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