A Case Study in Developing an Efficient Multi-threaded EDA Parser: Synopsys SDF Parser

Traditional EDA flows are made up of different point tools stitched together to progress from higher levels of design abstraction to physical level chip details. Data, intent, and constraints are passed on through this flow via intermediate text files. Some of these files such as the Standard Delay Format (SDF) files, are significantly large in size, and may run into gigabytes. Parsing of these files is a challenge. Core EDA algorithms have more recently started embracing the concept of parallelism using multi-core processors. This has started increasing the contribution of the time taken by the parser in the whole flow, increasing the need to improve the parser performance. The authors propose a methodology for efficient multi-threading of parsers in EDA in [2]. This paper is a companion paper detailing the application of the methodology on the Synopsys SDF Parser. Performance improvements in the range of 4X on 8-core machines was observed on implementing this methodology.