• DocumentCode
    3271836
  • Title

    Combining Genetic Algorithms Based Task Mapping and Optimal Voltage Selection for Energy-Efficient Distributed System Synthesis

  • Author

    Liu, Yongpan ; Yang, Huazhong ; Luo, Rong ; Wang, Hui

  • Author_Institution
    Dept. of Electron. Eng., Tsinghua Univ., Beijing
  • Volume
    3
  • fYear
    2006
  • fDate
    25-28 June 2006
  • Firstpage
    2074
  • Lastpage
    2078
  • Abstract
    Energy consumption has become one of dominant design concerns in distributed embedded systems. Dynamic voltage scaling (DVS) techniques have been proved to be quite effective in reducing both dynamic and static power consumption simultaneously. Thus, integrating processing elements (PEs) supporting DVS techniques into distributed embedded systems synthesis becomes an imperative way to make an energy-efficient design budget. In this paper, we propose a synthesis framework, which integrates task mapping, scheduling and voltage selection together to minimize energy consumption of distributed systems. Genetic algorithms based task mapping are deployed to do task mapping in the outer loop, which can maximize the energy saving possibilities. A nonlinear programming based optimal voltage selection engine is then used in the inner loop. Unlike previous approaches, this combination is the first time to be implemented, and relevant experiment results show that, comparing to separate synthesis flows, up to 40% more energy savings are achieved
  • Keywords
    circuit CAD; embedded systems; genetic algorithms; low-power electronics; nonlinear programming; scheduling; DVS technique; combining genetic algorithm; distributed embedded systems synthesis; dynamic voltage scaling; dynamic-static power consumption; energy consumption; energy-efficiency design; nonlinear programming; optimal voltage selection engine; processing element integration; scheduling; task mapping; Design optimization; Diversity reception; Dynamic voltage scaling; Embedded system; Energy consumption; Energy efficiency; Genetic algorithms; Processor scheduling; Switches; Voltage control;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Communications, Circuits and Systems Proceedings, 2006 International Conference on
  • Conference_Location
    Guilin
  • Print_ISBN
    0-7803-9584-0
  • Electronic_ISBN
    0-7803-9585-9
  • Type

    conf

  • DOI
    10.1109/ICCCAS.2006.285087
  • Filename
    4064313