DocumentCode
3271928
Title
A 900MHz high efficiency and linearity adaptive CMOS power amplifier
Author
Wang, Jing ; Liu, Zhangfa
Author_Institution
Sch. of Electron. & Inf. Eng., Beijing Jiaotong Univ., Beijing, China
fYear
2011
fDate
15-17 April 2011
Firstpage
969
Lastpage
972
Abstract
A high efficiency, linear, adaptive radio frequency (RF) power amplifier (PA) is presented. The working frequency is about 900MHz. The circuit employs a self-bias cascode for a higher performance and an adaptive bias to enhance linear and efficiency of the PA as well. This power amplifier is designed with the SMIC 0.18um CMOS RF process. The power supply is 1.8V. The simulation results show that the PA has a power gain of 30dB. In addition, the Power-Added Efficiency is over 33%.
Keywords
CMOS analogue integrated circuits; UHF power amplifiers; low-power electronics; CMOS RF process; SMIC; adaptive radio frequency power amplifier; frequency 900 MHz; linearity adaptive CMOS power amplifier; power supply; power-added efficiency; self-bias cascode; size 0.18 mum; voltage 1.8 V; CMOS integrated circuits; Linearity; MOSFET circuits; Power amplifiers; Radio frequency; Resistance; Simulation; RF power amplifier; adaptive bias; high efficiency; linear;
fLanguage
English
Publisher
ieee
Conference_Titel
Electric Information and Control Engineering (ICEICE), 2011 International Conference on
Conference_Location
Wuhan
Print_ISBN
978-1-4244-8036-4
Type
conf
DOI
10.1109/ICEICE.2011.5777187
Filename
5777187
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