A fully integrated PLL frequency synthesizer LSI for mobile communication system

Author

Yasunaga, T. ; Hirano, S. ; Maeda, R. ; Hiraoka, Y. ; Andou, T. ; Miyahara, Y.

Author_Institution

Div. of Corp. Eng., Matsushita Commun. Ind. Co. Ltd., Yokohama, Japan

fYear

2001

fDate

20-22 May 2001

Firstpage

65

Lastpage

68

Abstract

A fully integrated phase locked loop (PLL) frequency synthesizer LSI has been developed. This newly developed fractional-N type PLL LSI consists of an on-chip loop filter and a voltage controlled oscillator (VCO) with an on-chip resonator circuit. This VCO has a band-switching tuning circuit using MOS capacitors and an analog tuning circuit using PN varactor diodes. Both these tuning circuits are controlled automatically without external adjustment. The phase noise of the VCO at 2.2 GHz is -92.5 dBc/Hz at 50 kHz offset, while the frequency switching time is 170 /spl mu/s.

Keywords

MMIC oscillators; UHF integrated circuits; UHF oscillators; circuit tuning; frequency synthesizers; land mobile radio; large scale integration; phase locked loops; phase noise; varactors; voltage-controlled oscillators; 170 mus; 2.2 GHz; MOS capacitors; PLL frequency synthesizer LSI; PN varactor diodes; analog tuning circuit; band-switching tuning circuit; fractional-N type PLL; frequency switching time; mobile communication system; on-chip loop filter; on-chip resonator circuit; phase noise; tuning circuits; voltage controlled oscillator; Automatic control; Circuit optimization; Diodes; Frequency synthesizers; Large scale integration; MOS capacitors; Phase locked loops; Resonator filters; Varactors; Voltage-controlled oscillators;

fLanguage

English

Publisher

ieee

Conference_Titel

Radio Frequency Integrated Circuits (RFIC) Symposium, 2001. Digest of Papers. 2001 IEEE

Conference_Location

Phoenix, AZ, USA

ISSN

1529-2517

Print_ISBN

0-7803-6601-8

Type

conf

DOI

10.1109/RFIC.2001.935643

Filename

935643