A flexible 10-300 MHz receiver IC employing a bandpass sigma-delta ADC

Author

Schreier, R. ; Lloyd, J. ; Singer, L. ; Weiss, F. ; Sam, B. ; Paterson, D. ; Jacobs, C. ; Steinheider, J. ; Timko, M. ; Zhou, J. ; Martin, W.

Author_Institution

Analog Devices Inc., Wilmington, MA, USA

fYear

2001

fDate

20-22 May 2001

Firstpage

71

Lastpage

74

Abstract

This 0.6 /spl mu/m BiCMOS IC mixes a 10-300 MHz first IF down to a 1.5-3 MHz second IF and digitizes the result with a bandpass sigma-delta ADC. The ADC achieves 88 dB SNR in a 10 kHz bandwidth, 75 dB SNR in a 200 kHz bandwidth and >90 dB of image rejection while consuming only 8 mA from a 2.7 V supply. The complete IC, which incorporates an LNA, mixer, active anti-alias filter, VGA, ADC, decimation filter and two synthesizers, achieves a noise figure of 11 dB and an IIP3 of -1 dBm with a power consumption of 120 mW.

Keywords

BiCMOS integrated circuits; radio receivers; sigma-delta modulation; 0.6 micron; 10 to 300 MHz; 120 mW; 2.7 V; 8 mA; BiCMOS IC; IIP3; RF receiver; bandpass sigma-delta ADC; bandwidth; image rejection; noise figure; power consumption; signal-noise ratio; Active filters; Band pass filters; Bandwidth; BiCMOS integrated circuits; Delta-sigma modulation; Integrated circuit noise; Integrated circuit synthesis; Noise figure; Signal to noise ratio; Synthesizers;

fLanguage

English

Publisher

ieee

Conference_Titel

Radio Frequency Integrated Circuits (RFIC) Symposium, 2001. Digest of Papers. 2001 IEEE

Conference_Location

Phoenix, AZ, USA

ISSN

1529-2517

Print_ISBN

0-7803-6601-8

Type

conf

DOI

10.1109/RFIC.2001.935645

Filename

935645